DocumentCode
2874009
Title
A self-testing PLA
Author
Grassl, G. ; Pfleiderer
Author_Institution
Siemens Research Laboratories, Munich, Germany
Volume
XXV
fYear
1982
fDate
10-12 Feb. 1982
Firstpage
60
Lastpage
61
Abstract
A technique affording recognition of all stuck-at faults and shorts within a PLA will be presented; each matrix transistor is addressed via shift registers. PLA specific problems of high fan-in are solved with an area overhead of less than 20%.
Keywords
Automatic testing; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Integrated circuit technology; Logic testing; Programmable logic arrays; Registers; Solid state circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1982.1156329
Filename
1156329
Link To Document