DocumentCode
2874172
Title
An ECL compatible 4K CMOS RAM
Author
Hudson, E. ; Smith, Samuel
Author_Institution
Intel Corporation, Santa Clara, CA, USA
Volume
XXV
fYear
1982
fDate
10-12 Feb. 1982
Firstpage
248
Lastpage
249
Abstract
This paper will discuss a 4K×1 ECL compatible static RAM using a HMOSII/CMOS process and speed-optimized CMOS circuits. Input and output levels have been found to meet specifications of the ECL 10K logic family. Address access time is 20ns and current drain is 150mA under nominal conditions.
Keywords
CMOS logic circuits; CMOS technology; Delay; Driver circuits; Inverters; MOS devices; Pulse amplifiers; Read-write memory; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1982.1156338
Filename
1156338
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