A Prefix Based Reconfigurable Adder

This paper presents a prefix-based reconfigurable adder. The coarse grained reconfigurable adder uses 8-bit carry generation block as a single unit. Eight such units along with the controlled-carry combination logic (prefix based), are used to form a 64-bit adder. The adder can perform one 64-bit addition, two 32-bit, four 16-bit, and eight 8-bit additions. The adder structure is modified resulting in low fan-out. Simulation results indicate that with a marginal increase in delay, the proposed prefix based reconfigurable adder results in up to 27% power delay product reduction when compared to existing design.