DocumentCode :
2874522
Title :
A two stage template matching algorithm and its İmplementation on FPGA
Author :
Aktas, Hakan ; Sever, Refik ; Toreyin, Behcet Ugur
Author_Institution :
Elektrik-Elektron. Muhendisligi Bolumu, Akdeniz Univ., Antalya, Turkey
fYear :
2015
fDate :
16-19 May 2015
Firstpage :
2214
Lastpage :
2217
Abstract :
In this paper, to decrease the computational cost and number of cycles in Template Matching Algorithm, a novel two-stage algorithm is proposed. The Sum of Absolute Differences method is used for matching. The proposed algorithm is implemented on Field-Programmable-Gate-Array (FPGA). The algorithm is accelerated with the effective usage of Block RAMs distributed on FPGA. Thus, the proposed algorithm became fast enough for real time object tracking applications on UAVs.
Keywords :
field programmable gate arrays; image matching; image processing; object tracking; FPGA implementation; UAV; computational cost reduction; field programmable gate array; real time object tracking; sum of absolute differences method; template matching algorithm; two stage algorithm; Computer vision; Correlation; Field programmable gate arrays; Prediction algorithms; Random access memory; Signal processing algorithms; Streaming media; Field-Programmable-Gate-Array (FPGA); Memorry Adressing; Parallel Processing; Sum of Absolute Differences; Template Matching; Unmanned Air Vehicle (UAV);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing and Communications Applications Conference (SIU), 2015 23th
Conference_Location :
Malatya
Type :
conf
DOI :
10.1109/SIU.2015.7130315
Filename :
7130315
Link To Document :
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