Fabrication and modeling of silicon-embedded high Q inductors

In this paper, we report on the fabrication and modeling of a CMOS-compatible silicon-embedded high-performance integrated inductor (μH range) with a Q-factor of over 60 and a self-resonant frequency of greater than 150 MHz. The fabrication process is based on DRIE and a pulse-reverse super-conformal electroplating technique. A lumped-element equivalent circuit model based on finite element method analysis of electromagnetic field parameters was also developed to simulate the inductor. Inductors with different geometric design parameters were simulated to optimize the performance. A Q factor of over 60 (at 40 MHz) for a 2 μH inductor was measured, which is the highest reported in the literature for integrated inductors at such frequencies. The measurement results closely match the simulations from the lumped circuit model.