DocumentCode
287532
Title
Reprogrammable hardware emulation for ASICs makes through design verification practical
Author
Walters, S.
Author_Institution
Quickturn Syst. Inc., Mountain View, CA, USA
fYear
1989
fDate
Feb. 27 1989-March 3 1989
Firstpage
484
Lastpage
486
Abstract
The author argues that the current simulation-based product development methodologies have an intrinsic limitation that makes thorough ASIC (application-specific integrated circuits) design verification impractical at the system level. A description is given of technology called reprogrammable hardware emulation which, combined with simulation-based technologies, results in vastly more effective design verification approach. The author concludes that it is inevitable that reprogrammable hardware emulation will eventually be incorporated into the design-verification methodologies of all companies making a major commitment to the use of ASICs.<>
Keywords
application specific integrated circuits; circuit CAD; ASICs; application-specific integrated circuits; design verification; reprogrammable hardware emulation; simulation-based product development; Application specific integrated circuits; Circuit simulation; Emulation; Graphics; Hardware; Integrated circuit modeling; Integrated circuit technology; Paper technology; Real time systems; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
COMPCON Spring '89. Thirty-Fourth IEEE Computer Society International Conference: Intellectual Leverage, Digest of Papers.
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-8186-1909-0
Type
conf
DOI
10.1109/CMPCON.1989.301980
Filename
301980
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