DocumentCode
2875406
Title
A sub 100ns 32K EEPROM
Author
Kuo, Chia-Chen ; Yeargain, J. ; Downey, W. ; Bormann, A.
Author_Institution
Motorola, Inc., Austin, TX, USA
Volume
XXV
fYear
1982
fDate
10-12 Feb. 1982
Firstpage
106
Lastpage
107
Abstract
A 32K floating-gate EEPROM, having a typical access time of 90ns, latched inputs, erasure by word, subpage, page or bulk, as well as bulk ´O´ programming, will be described.
Keywords
Assembly; Circuits; Current supplies; EPROM; Electronics packaging; Emergency power supplies; Fuses; Nonvolatile memory; Silicon; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1982.1156405
Filename
1156405
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