DocumentCode :
2876112
Title :
The Design of Asynchronous Microprocessor Based on Optimized NCL_X Design-Flow
Author :
Jin, Gang ; Wang, Lei ; Wang, Zhiying
Author_Institution :
Sch. of Comput. Sci., Nat. Univ. of Defense Technol., Changsha, China
fYear :
2009
fDate :
9-11 July 2009
Firstpage :
357
Lastpage :
364
Abstract :
NCL X circuit is a very efficient way to implement the QDI circuit, which can get all the advantages of the asynchronous circuit, especially the average performance. But the NCL_X circuits suffer from its huge area overhead. To solve this problem, a method for optimizing the complete detection network in the NCL_X circuit has been introduced in this paper. Using this method can dramatically reduced the area of the NCL_X circuit, according to the experimental result, the area of the NCL_X circuit may be reduced more than 60%. We also use this optimized method to implement an asynchronous microprocessor pipeline (APC). Compared to the synchronous implementation, this NCL_X implementation can achieve higher performance because the NCL_X circuit can get the average performance.
Keywords :
asynchronous circuits; logic design; microprocessor chips; NCL X circuit; QDI circuit; asynchronous circuit; asynchronous microprocessor pipeline; complete detection network; optimized NCL_X design-flow; Asynchronous circuits; Clocks; Delay; Design optimization; Electronic design automation and methodology; Energy consumption; Hazards; Microprocessors; Optimization methods; Timing; NCL X; asynchronous; design flow; optimization; time analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Networking, Architecture, and Storage, 2009. NAS 2009. IEEE International Conference on
Conference_Location :
Hunan
Print_ISBN :
978-0-7695-3741-2
Type :
conf
DOI :
10.1109/NAS.2009.64
Filename :
5197351
Link To Document :
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