• DocumentCode
    2876225
  • Title

    A Domain Specific Language for Reconfigurable Path-based Monte Carlo Simulations

  • Author

    Thomas, David B. ; Luk, Wayne

  • Author_Institution
    Imperial Coll. London, London
  • fYear
    2007
  • fDate
    12-14 Dec. 2007
  • Firstpage
    97
  • Lastpage
    104
  • Abstract
    FPGAs have been successfully used to accelerate many computationally bound applications, such as high-performance Monte-Carlo simulations, but the amount of programmer effort required in development, testing, and tuning is also very high, requiring a new custom design for each application. This paper presents Contessa, a pure-functional continuation-based language for describing path-based Monte-Carlo simulations, and a completely automated method for turning platform-independent Contessa programs into high-performance hardware implementations. Our approach exploits the large degree of thread-based parallelism available in Monte-Carlo simulations, allowing data-dependent control-flow and loop-carried dependencies to be expressed, while retaining high-performance. The Contessa toolchain is evaluated using five different simulation kernels, in comparison to both software and manually described hardware. When compared to an existing FPGA implementation, Contessa requires a quarter of the Handel-C source-code length, and doubles the clock rate to over 300MHz while requiring a similar number of resources, and also provides a 35 times speedup over a C++ implementation using an Opteron 2.2GHz.
  • Keywords
    Monte Carlo methods; electronic engineering computing; field programmable gate arrays; functional languages; multi-threading; program control structures; Contessa program; FPGA; Handel-C source-code length; data-dependent control-flow; domain specific language; loop-carried dependency; pure-functional continuation-based language; reconfigurable path-based Monte Carlo simulation; thread-based parallelism; Automatic control; Computer applications; Domain specific languages; Field programmable gate arrays; Hardware; Life estimation; Parallel processing; Programming profession; Testing; Turning;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Technology, 2007. ICFPT 2007. International Conference on
  • Conference_Location
    Kitakyushu
  • Print_ISBN
    978-1-4244-1472-7
  • Electronic_ISBN
    978-1-4244-1472-7
  • Type

    conf

  • DOI
    10.1109/FPT.2007.4439237
  • Filename
    4439237