Efficient reconfiguration of 2-D rectangular systolic arrays

The authors present a simple but elegant approach to designing a reconfigurable 2-D rectangular systolic array with much reduced overhead which is especially suited for fabrication-time reconfiguration which can be directed toward yield enhancement. The performance and effectiveness of the proposed design and the reconfiguration scheme is compared with a new approach, adopted by Kim and Reddy to reconfigure a 2-D systolic array. Extensive simulation results indicate that the approach provides a much enhanced utilization of spare cells and a higher survivability in the presence of multipath faults, while requiring very minimal low-cost reconfiguration circuitry