Title :
Implementations of Reconfigurable Logic Arrays on FPGAs
Author :
Sasao, Tsutomu ; Nakahara, Hiroki
Author_Institution :
Kyushu Inst. of Technol., Iizuka
Abstract :
This paper presents a method to implement a reconfigurable logic array on an FPGA. To design circuits with 2-valued k-input LUTs, 2k-valued logic is introduced. Standard benchmark functions as well as symmetric functions are efficiently implemented by a logic array with 2k-valued variables. Number of products and number of bits to represent functions by the expressions with 2k-valued variables for k = 1,2,3,4, and 5 are compared. Both sum-of-products expressions and EXOR sum-of-products expressions of 2k-valued logic significantly reduces needed FPGA resources, when 2 les k les 5. Experimental results for benchmark functions and symmetric functions are shown. Implementations of arrays with 16-valued variables on Xilinx and Altera FPGAs are also shown.
Keywords :
field programmable gate arrays; logic design; multivalued logic; reconfigurable architectures; symmetric switching functions; 2k-valued logic design; Altera FPGA; EXOR sum-of-products expressions; FPGA; Xilinx FPGA; multivalued variables; reconfigurable logic arrays; standard benchmark functions; sum-of-products expressions; symmetric functions; Clocks; Field programmable gate arrays; Logic arrays; Logic circuits; Logic design; Logic functions; Multiplexing; Programmable logic arrays; Reconfigurable logic; Table lookup;
Conference_Titel :
Field-Programmable Technology, 2007. ICFPT 2007. International Conference on
Conference_Location :
Kitakyushu
Print_ISBN :
978-1-4244-1472-7
Electronic_ISBN :
978-1-4244-1472-7
DOI :
10.1109/FPT.2007.4439252
