DocumentCode
2876468
Title
Assembly Yields Characterization of High IO Density, Fine Pitch Flip Chip in Package Using No-Flow Underfill
Author
Lee, Sangil ; Baldwin, Daniel F. ; Master, Raj ; Parthasarathy, Srinivasan
Author_Institution
Georgia Inst. of Technol., Atlanta
fYear
2007
fDate
May 29 2007-June 1 2007
Firstpage
35
Lastpage
41
Abstract
The application of no-flow underfills for high IO density, fine-pitch, flip chip in package (FCIP) applications is analyzed. A number of commercially developed no flow underfills are evaluated. Process parameters for improved assembly yields depend strongly on the underfill materials characteristics and particularly the reflow profile. The test vehicles used in this study incorporate high I/O density, large chip size, and small interconnect pitch. This paper presents a methodology for evaluating new commercial no flow underfill materials, techniques for establishing baseline reflow profiles for yielding FCIP devices, and initial yield sensitivity analysis for the FCIP assembly process.
Keywords
assembling; fine-pitch technology; flip-chip devices; assembly process; assembly yields; fine pitch flip chip in package; high IO density; no-flow underfill; sensitivity analysis; Assembly; Conducting materials; Flip chip; Lead; Packaging; Sensitivity analysis; Temperature; Testing; Thermal conductivity; Vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2007. ECTC '07. Proceedings. 57th
Conference_Location
Reno, NV
ISSN
0569-5503
Print_ISBN
1-4244-0985-3
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2007.373773
Filename
4249859
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