DocumentCode
2876583
Title
A Systolic Algorithm for the Quadratic Assignment Problem and its FPGA Implementation
Author
Kimura, Yoshihiro ; Wakabay, Shin Ichi ; Nagayama, Shinobu
Author_Institution
Hiroshima City Univ., Hiroshima
fYear
2007
fDate
12-14 Dec. 2007
Firstpage
261
Lastpage
264
Abstract
In this paper, we propose a parallel algorithm to solve the quadratic assignment problem in a short execution time. The proposed algorithm is based on tabu search, and its main body is a systolic algorithm, which runs on a one-dimensional array of simple processing units. During the algorithm execution, multiple neighborhood solutions are evaluated in parallel and each solution is evaluated in a pipeline fashion. The proposed algorithm effectively utilizes internal block RAMs of recent large scale FPGAs. Experimental results show the efficiency and effectiveness of the proposed algorithm.
Keywords
combinatorial mathematics; computational complexity; field programmable gate arrays; heuristic programming; parallel algorithms; pipeline processing; quadratic programming; random-access storage; search problems; systolic arrays; FPGA implementation; NP-hard combinatorial optimization problems; internal block RAM; one-dimensional processing unit array; parallel algorithm; pipeline fashion; quadratic assignment problem; systolic algorithm; tabu search; Design engineering; Field programmable gate arrays; Genetic engineering; Hardware; Large-scale systems; Mathematical programming; Optimization methods; Parallel algorithms; Pipelines; Traveling salesman problems;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2007. ICFPT 2007. International Conference on
Conference_Location
Kitakyushu
Print_ISBN
978-1-4244-1471-0
Electronic_ISBN
978-1-4244-1472-7
Type
conf
DOI
10.1109/FPT.2007.4439261
Filename
4439261
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