DocumentCode :
2876605
Title :
An interactive, integrated, hierarchical CAD system for microprocessor design
Author :
Cavill, P. ; Chesney, H. ; Fuge, T. ; Harriman, G. ; Jakson, J. ; Shepherd, Roderick
Author_Institution :
Inmos, Ltd., Bristol, England
Volume :
XXVI
fYear :
1983
fDate :
23-25 Feb. 1983
Firstpage :
136
Lastpage :
137
Abstract :
A system used to design a 5k mils2, 5MIP CMOS micro-processor will be reported. The design includes an hierarchical design language, mixed-mode simulator, and interactive hierarchical decomposition system for layout design. Symbolic layout techniques were used for low level cell designs.
Keywords :
Arithmetic; Circuit simulation; Design automation; Design optimization; Hardware design languages; Logic circuits; Microprocessors; Read only memory; Registers; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1983 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1983.1156474
Filename :
1156474
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2876605
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