DocumentCode :
2876727
Title :
A 200ns 256k HMOSII EPROM
Author :
Van Buskirk, M. ; Fisher, W. ; Holler ; Korsh, G.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Volume :
XXVI
fYear :
1983
fDate :
23-25 Feb. 1983
Firstpage :
162
Lastpage :
163
Abstract :
Using a double poly HMOSII wafer stepper technology, a 4.29mm × 4.29mm 32K×8 EPROM with a 36μ m2cell size has been designed with typical chip access time and power dissipation of 200ns and 350mW, respectively, and a 12V programming mode.
Keywords :
Circuit synthesis; Design engineering; EPROM; Power engineering and energy; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1983 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1983.1156481
Filename :
1156481
Link To Document :
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