DocumentCode :
2876732
Title :
Resistive vias defect localization methodology in failure analysis
Author :
Chunlei, Wu ; Motohiko, Masuda ; Wang, Winter ; Song, Grace ; Miao, Wu ; Li, Tian ; Joe, Yu
Author_Institution :
Freescale Semicond. (China) Ltd., Tianjin, China
fYear :
2011
fDate :
4-7 July 2011
Firstpage :
1
Lastpage :
4
Abstract :
Generally, it is very difficult to locating a resistive via defect in function failure analysis in CMOS circuit. This type defect could not be located directly by Photon emission microscopy analysis or other failure analysis techniques. In this paper, a useful method is introduced to show how to locate a resistive via defect. Some cases are presented in detail. And some valuable experiences are shared which could help us locate a resistive via defect quickly.
Keywords :
CMOS integrated circuits; failure analysis; microscopy; CMOS circuit; function failure analysis; photon emission microscopy analysis; resistive vias defect localization methodology; CMOS integrated circuits; Failure analysis; Layout; MOS devices; Metals; Probes; Resistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2011 18th IEEE International Symposium on the
Conference_Location :
Incheon
ISSN :
1946-1542
Print_ISBN :
978-1-4577-0159-7
Electronic_ISBN :
1946-1542
Type :
conf
DOI :
10.1109/IPFA.2011.5992711
Filename :
5992711
Link To Document :
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