DocumentCode :
2876842
Title :
A 35ns 64K static column DRAM
Author :
Baba, F. ; Mochizuki, Hidehiko ; Yabu, T. ; Shirai, Keigo ; Miyasaka, K.
Author_Institution :
Fujitsu Ltd., Kawasaki, Japan
Volume :
XXVI
fYear :
1983
fDate :
23-25 Feb. 1983
Firstpage :
64
Lastpage :
65
Keywords :
Application software; Circuits; Clocks; Computer applications; DRAM chips; Decoding; High performance computing; MOS devices; Random access memory; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1983 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1983.1156488
Filename :
1156488
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2876842
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