DocumentCode
2877154
Title
A CONCURRENT TEST ARCHITECTURE FOR MASSIVELY-PARALLEL COMPUTERS AND ITS ERROR DETECTION CAPABILITY
Author
Hancu, Marius V A ; Iwasaki, Kazuhiko ; Sato, Yuji ; Sugie, Mamoru
fYear
1991
fDate
26-30 Oct 1991
Firstpage
758
Keywords
Computer architecture; Computer errors; Computerized monitoring; Concurrent computing; Encoding; Face detection; Hardware; Multiprocessing systems; Routing; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1991, Proceedings., International
ISSN
1089-3539
Print_ISBN
0-8186-9156-5
Type
conf
DOI
10.1109/TEST.1991.519741
Filename
519741
Link To Document