Title :
Delay Testing Quality in Timing-Optimized Designs
Author :
Park, Eun Sei ; Underwood, Bill ; Williams, T.W. ; Mercer, M. Ray
Keywords :
Circuit faults; Circuit testing; Clocks; Delay; Density functional theory; Design automation; Logic testing; Manufacturing processes; Network synthesis; Timing;
Conference_Titel :
Test Conference, 1991, Proceedings., International
Print_ISBN :
0-8186-9156-5
DOI :
10.1109/TEST.1991.519756
