DocumentCode
2877617
Title
Distributed Layout Verification Using Sequential Software and Standard Hardware
Author
Shiran, Yehuda
fYear
1991
fDate
26-30 Oct 1991
Firstpage
1009
Keywords
Code standards; Concurrent computing; Data models; Hardware; Parallel machines; Parallel processing; Partitioning algorithms; Software standards; Standards development; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1991, Proceedings., International
ISSN
1089-3539
Print_ISBN
0-8186-9156-5
Type
conf
DOI
10.1109/TEST.1991.519768
Filename
519768
Link To Document