• DocumentCode
    2877657
  • Title

    Stress induced self aligned contact failure during tungsten-poly gate process in sub-60 nm memory device

  • Author

    Sung, Min-Gyu ; Kim, Yong Soo ; Park, Sung-Ki

  • Author_Institution
    Memory R&D Div., Hynix Semicond. Inc., Icheon, South Korea
  • fYear
    2011
  • fDate
    4-7 July 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    We investigated the mechanism of stress-induced self-aligned contact (SAC) failure in the sub-60 nm W-dual poly metal gate process in DRAM devices. It was found that during NH3 pre-purge step of gate capping nitride deposition, amorphous WNx barrier and side of gate etched W electrode were transformed into tensile crystallized W2N, which relieves high compressive stress of inner gate W. Asymmetrical relief of W stress could create torque leading to gate leaning which is a main culprit of SAC failure during reliability test. Therefore, by reducing NH3 pre-purge time, we successfully could reduce gate leaning which endures good reliability characteristics.
  • Keywords
    DRAM chips; amorphous state; etching; integrated circuit reliability; torque; tungsten; DRAM devices; W; amorphous barrier; dual polymetal gate process; gate capping nitride deposition; gate etched tungsten electrode; gate leaning; memory device; reliability test; stress induced self-aligned contact failure; tensile crystal; torque; tungsten-polygate process; Electrodes; Inspection; Logic gates; Reliability; Stress; Thermal stresses; Tungsten;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Physical and Failure Analysis of Integrated Circuits (IPFA), 2011 18th IEEE International Symposium on the
  • Conference_Location
    Incheon
  • ISSN
    1946-1542
  • Print_ISBN
    978-1-4577-0159-7
  • Electronic_ISBN
    1946-1542
  • Type

    conf

  • DOI
    10.1109/IPFA.2011.5992764
  • Filename
    5992764