Novel Low-Temperature CoC Interconnection Technology for Multichip LSI (MCL)

We developed a novel low-temperature chip on chip (CoC) interconnection technology featuring several thousand micro-solder bumps and a low-temperature process below 180degC. The data transfer rate between chips becomes comparable to a system on chip (SoC) by using this technology. The test chips we used had 1402 indium bumps with a diameter of 30 mum and a pitch of 60 mum. Two chips were bonded to each other while controlling the gap and growth of the intermetallic compounds (IMCs) between the two chips. We confirmed from the results of electrical evaluation that the four-terminal resistance of an indium micro bump was around 7 mOmega and the high open/short yield of micro-bump daisy-chain test element groups (TEGs). We thus successfully demonstrated low-temperature CoC technology featuring a flux-less bonding process with indium bumps. We are confident that these technologies will be indispensable to creating new applications.