Nanoscale thermally induced strain and stress analysis by complementary Scanning Thermal Microscopy Techniques

Miniaturization of integrated circuits is coupled with increased power dissipation and associated thermal and thermomechanical effects which lead to device malfunction. Within this work a measurement technique is introduced that allows thermally induced strain and stress analysis of electronic devices with nanometre spatial resolution and highest sensitivity by Finite Element analysis assisted complementary Scanning Near-field Thermal Microscopy (SThM) and Scanning Joule Expansion Microscopy (SJEM). As an illustration, an interconnect constriction is investigated.