DocumentCode
2878357
Title
Landscape for semiconductor analysis: Issues and challenges
Author
Kim, Kinam ; Park, Gyeong-Su
Author_Institution
Samsung Adv. Inst. of Sci. & Technol. (SAIT), Samsung Electron. Co., Yongin, South Korea
fYear
2011
fDate
4-7 July 2011
Firstpage
1
Lastpage
9
Abstract
This paper summarizes the landscape for semiconductor analysis. High-resolution imaging and microanalysis are discussed first because they are used in most of the core process technologies that enable device scaling beyond the current 30 nm technology node. Key technology for analysis of dopant distribution, contamination, and strain is reviewed from the viewpoints of sensitivity, spatial resolution, contamination level, and defect size. The final section describes microscopy based on in situ techniques, which can play an important role in developing extended complementary metal-oxide-semiconductor (CMOS) and beyond CMOS as well as play a role in understanding the fundamental physics of new and emerging semiconductor devices. Within each technology area, future directions that are being driven by new materials and processes are briefly outlined.
Keywords
CMOS integrated circuits; chemical analysis; doping profiles; electron microscopy; semiconductor device reliability; beyond CMOS; contamination level; defect size; device scaling; dopant distribution; extended complementary metal-oxide-semiconductor; high-resolution imaging; in situ techniques; microanalysis; microscopy; semiconductor analysis; spatial resolution; Atomic measurements; Probes; Scanning electron microscopy; Spatial resolution; Strain; Three dimensional displays;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits (IPFA), 2011 18th IEEE International Symposium on the
Conference_Location
Incheon
ISSN
1946-1542
Print_ISBN
978-1-4577-0159-7
Electronic_ISBN
1946-1542
Type
conf
DOI
10.1109/IPFA.2011.5992801
Filename
5992801
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