Experimental Study on the Damage Effects of Integrated Circuits Stressed with ESD EMP

Author

Jing-ping, Chen ; Shang-he, Liu ; Zhi-liang, Tan ; Qi-yuan, He

Author_Institution

Mech. Eng. Coll., Inst. of Electrostatic & Electromagn. Protection, Hebei

fYear

2006

fDate

1-4 Aug. 2006

Firstpage

29

Lastpage

33

Abstract

Several RC (resistance and capacitance) combinations were adopted in ESS-AX200 ESD simulator to generate different ESD pulses. And the pulses were injected into an integrated circuit. The damage effects of the integrated circuit stressed with these pulses were investigated. Results showed that the current passing through the device will increase when the discharge voltage increases. The relationship between the peak energy absorbed by the IC chip and the discharge voltage can be modeled as the bell-shaped Gaussian function. The failure thresholds of the IC were the same order of magnitude and were found to vary by less than a factor of two

Keywords

Gaussian processes; electromagnetic pulse; electrostatic discharge; integrated circuits; ESD EMP; bell-shaped Gaussian function; damage effects; discharge voltage; integrated circuits; Capacitance; Circuit simulation; Circuit testing; EMP radiation effects; Electrostatic discharge; Oscilloscopes; Probes; Pulse circuits; Pulse generation; Voltage; ESD EMP; damage effects; integrated circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Environmental Electromagnetics, The 2006 4th Asia-Pacific Conference on

Conference_Location

Dalian

Print_ISBN

1-4244-0183-6

Type

conf

DOI

10.1109/CEEM.2006.257901

Filename

4027233