Title :
A sub 100ns 256K DRAM in CMOS III technology
Author :
Kung, R. ; Mohsen, A. ; Schutz, J. ; Madland, P. ; Webb, C. ; Hamdy, E. ; Simonsen, C. ; Guo, Renjia ; Chou, Sheng
Author_Institution :
Intel Corp., Aloha, OR, USA
Abstract :
A sub 100ns 256Kb CMOS DRAM with 25μW standby power, 25MHz ripple mode and static column mode data rate will be reported. Channel length is 1μm and the SER is below 0.1%/1KHr.
Keywords :
CMOS technology; Capacitors; Circuits; Current supplies; Decoding; Fuses; Paper technology; Random access memory; Shift registers; Silicon;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1984.1156591
