DocumentCode :
2878700
Title :
A 59ns 256K DRAM using LD3technology and double level metal
Author :
Kertis, R. ; Fitzpatrick, K. ; Yu-Pin Han
Author_Institution :
Mostek Corp., Carrollton, TX, USA
Volume :
XXVII
fYear :
1984
fDate :
22-24 Feb. 1984
Firstpage :
96
Lastpage :
97
Keywords :
Capacitance; Content addressable storage; Integrated circuit noise; Laser modes; MOSFET circuits; Maintenance; Random access memory; Signal restoration; Signal to noise ratio; Solid state circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1984.1156598
Filename :
1156598
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2878700
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