Title :
A self calibrating 12b 12 µ s CMOS ADC
Author :
Hae-Sung Lee ; Hodges, D.A. ; Gray, P.
Author_Institution :
Univ. of California, Berkeley, CA, USA
Abstract :
Linearity errors of a weighted-capacitor ADC have been corrected, using a simple digital algorithm. A CMOS comparator which resolves 50μV in 500ns, allows this approach to yield a 12b accurate conversion in 22us. Chip area is under 7mm2.
Keywords :
Analog-digital conversion; Calibration; Circuit testing; Delay; Latches; MOS capacitors; Resistors; Semiconductor device measurement; System testing; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1984.1156622
