DocumentCode :
2879447
Title :
A trimless 16b digital potentiometer
Author :
Holloway, Peter R.
Author_Institution :
Analog Devices, Wilmington, MA, USA
Volume :
XXVII
fYear :
1984
fDate :
22-24 Feb. 1984
Firstpage :
66
Lastpage :
67
Abstract :
Inherent 16b monotonicity overtime and temperature has been achieved in a voltage-segment DAC structure implemented in an N-well CMOS bipolar process by potentiometrically buffering a cascaded second stage across adjacent taps of an untrimmed resistor string. Settling time to 1/2 LSB is 3μs.
Keywords :
CMOS process; Data acquisition; Decoding; Differential amplifiers; Displays; Potentiometers; Process control; Resistors; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1984.1156642
Filename :
1156642
Link To Document :
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