DocumentCode :
2879477
Title :
An 8b 100MS/s flash ADC
Author :
Yoshii, Y. ; Asano, Katsunori ; Nakamura, Mitsutoshi ; Yamada, Chikatoshi
Author_Institution :
Sony Corp., Kanagawa, Japan
Volume :
XXVII
fYear :
1984
fDate :
22-24 Feb. 1984
Firstpage :
58
Lastpage :
59
Abstract :
This paper will describe an 8b flash ADC which achieves a conversion rate of 100MHz arid an input bandwidth of 30MHz at a power dissipation of 1200mW. The circuit is realized in an epitaxial-LOCOS process with a minimum line width of 2.5μm and a transistor fTof 4GHz at 45μA collector current.
Keywords :
Sampling methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1984.1156644
Filename :
1156644
Link To Document :
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