A nonlinear simulation model of integrated Hall devices in CMOS silicon technology

Author

Schweda, Josef ; Riedling, Karl

Author_Institution

Infineon Design Center, Villach, Austria

fYear

2002

fDate

6-8 Oct. 2002

Firstpage

14

Lastpage

20

Abstract

A new simulation model for Hall devices in CMOS silicon technology is proposed. Nonlinearities caused by effects, as back-bias and vertical field-effect, transient effects caused by parasitics and wide operational range in temperature were taken into account and implemented in VHDL-AMS. Behavioral equations and parameters are based in fundamental theory of Hall devices and semiconductor physics and verified experimentally. Comparisons between simulation and measured behavior of productive ICs were done to prove the correctness and completeness of the implemented set of equations and high accuracy of this model. To distinguish the benefits of the proposed model, simulations with the current Hall models are done with the same setups.

Keywords

CMOS integrated circuits; Hall effect devices; circuit simulation; field effect integrated circuits; hardware description languages; integrated circuit design; integrated circuit modelling; CMOS silicon technology; VHDL-AMS; integrated Hall devices; integrated circuits; nonlinear simulation; semiconductor physics; CMOS technology; Charge carriers; Circuit simulation; Doping; Equations; Resistors; Semiconductor device modeling; Shape measurement; Silicon; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Behavioral Modeling and Simulation, 2002. BMAS 2002. Proceedings of the 2002 IEEE International Workshop on

Print_ISBN

0-7803-7634-X

Type

conf

DOI

10.1109/BMAS.2002.1291051

Filename

1291051