Low-power-consuming 24-Gb/s multiplexer in 90-nm CMOS for optical transceivers

Author

Rodoni, Lucio Carlo ; Morf, Thomas ; Ellinger, Frank ; Von Büren, George ; Jäckel, Heinz

Author_Institution

Electron. Lab., Swiss Fed. Inst. of Technol., Zurich, Switzerland

fYear

2004

fDate

8-9 Nov. 2004

Firstpage

48

Lastpage

51

Abstract

In this paper, an integrated 2-to-1 selector multiplexer in 90-nm complementary metal-oxide semiconductor (CMOS) digital technology is presented. The multiplexer is based on a differential Gilbert-cell structure. Peaking inductors are used to improve the bandwidth. At a supply voltage of 1.2 V, a speed performance of 24 Gb/s is achieved. The circuit core consumes only 10 mA. Common drain output buffers allow measurements at 50 Ω.

Keywords

CMOS digital integrated circuits; buffer circuits; differentiating circuits; multiplexing equipment; optical communication equipment; transceivers; 1.2 V; 10 mA; 50 ohm; 90 nm; CMOS digital method; common drain output buffers; complementary metal oxide semiconductor digital method; differential Gilbert cell structure; multiplexer; optical transceivers; peaking inductors; Bandwidth; CMOS logic circuits; CMOS technology; Inductors; Multiplexing; Optical packet switching; Resistors; Switches; Transceivers; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices for Microwave and Optoelectronic Applications, 2004. EDMO 2004. 12th International Symposium on

Print_ISBN

0-7803-8574-8

Type

conf

DOI

10.1109/EDMO.2004.1412398

Filename

1412398