Title :
Sampling rate and quantification density control in VHDL-AMS
Author :
Hervé, Yannick ; Snaidero, Sébastien
Author_Institution :
CNRS-ERM, Illkirch-Graffenstaden, France
Abstract :
VHDL-AMS allows designers to describe a system with time dependent equations. If they want to plot a curve y=f(x), it becomes hard to ensure the sampling rate and the quantification density of x and y values. This paper submits a very simple method to control it using a little utility model written in VHDL-AMS, called the "Q_fier".
Keywords :
density control; hardware description languages; sampling methods; Q_fier; VHDL-AMS; quantification density control; sampling rate; time dependent equations; Analog computers; Application specific processors; Computational modeling; Convergence; Equations; Magnetic hysteresis; Sampling methods; Signal design; Testing; Voltage;
Conference_Titel :
Behavioral Modeling and Simulation, 2002. BMAS 2002. Proceedings of the 2002 IEEE International Workshop on
Print_ISBN :
0-7803-7634-X
DOI :
10.1109/BMAS.2002.1291064
