DocumentCode
2880249
Title
An ECL field programmable logic array
Author
Schmitz, C. ; Hingarh, H. ; Brown, Michael ; Hang Kwan ; Vithayathil, J.
Author_Institution
Fairchild Res. Center, Palo Alto, CA, USA
Volume
XXVII
fYear
1984
fDate
22-24 Feb. 1984
Firstpage
264
Lastpage
265
Abstract
This paper will cover a 4ns compatible ECL field programmable logic array, organized
with true and complement output. Features include vertical junction fuses as programmable elements and built-in test.
with true and complement output. Features include vertical junction fuses as programmable elements and built-in test.Keywords
Circuit faults; Clocks; Fuses; Logic arrays; Logic programming; Logic testing; Monitoring; Packaging; Phase change materials; Programmable logic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1984.1156685
Filename
1156685
Link To Document