DocumentCode
288091
Title
Image processing applications using a novel parallel computing machine based on reconfigurable logic
Author
Allinson, N.M. ; Howard, N.J. ; Kolcz, A.R. ; Tyrrell, A.M.
Author_Institution
Dept. of Electron., York Univ., UK
fYear
1994
fDate
1994
Firstpage
42401
Lastpage
42407
Abstract
Zelig is a 32 physical node fine-grained computer employing field-programmable gate arrays. Its application to the high speed implementation of various image pre-processing operations (in particular binary morphology) is described together with typical speed-up results
Keywords
image processing equipment; logic arrays; parallel machines; Zelig; binary morphology; field-programmable gate arrays; fine-grained computer; parallel computing machine; reconfigurable logic; speed-up results;
fLanguage
English
Publisher
iet
Conference_Titel
Parallel Architectures for Image Processing, IEE Colloquium on
Conference_Location
London
Type
conf
Filename
369680
Link To Document