DocumentCode
2882166
Title
A 100ns 256K CMOS EPROM
Author
Gaw, H. ; Hokelek, E. ; Holler ; Lee, Sang-Rim ; Olson, Lowell ; Reitsma, M. ; SO, Hing-Cheung ; Tam, Kimo ; Van Buskirk, M.
Author_Institution
Intel Corp., Santa Clara, CA, USA
Volume
XXVIII
fYear
1985
fDate
13-15 Feb. 1985
Firstpage
164
Lastpage
165
Abstract
This paper will cover a 256K CMOS EPROM with a 400ns access time achieved by use of address transition detection. Redundancy is implemented with metal-covered EPROM cells.
Keywords
Boron; CADCAM; Circuits; Computer aided manufacturing; Decoding; EPROM; Glass; Implants; MOS devices; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1985.1156796
Filename
1156796
Link To Document