DocumentCode
2882628
Title
A word-wide 1Mb ROM with error correction
Author
Davis, Howard
Author_Institution
Mostek Corp., Carrollton, TX, USA
Volume
XXVIII
fYear
1985
fDate
13-15 Feb. 1985
Firstpage
40
Lastpage
41
Abstract
A 1Mb ROM, organized as 64K×16b or 128K×8b, that uses address/data multiplexing fit into a 28-pin package, will be reported. Combining dynamic circuit techniques with a 1.5μ double-level metal CMOS process, a typical access time of 50ns has been achieved. On-chip error correction is also available by using a modified Hamming code.
Keywords
Circuits; Error correction; Error correction codes; Read only memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1985.1156821
Filename
1156821
Link To Document