DocumentCode
2884201
Title
Yet a faster address generation scheme for the computation of prime factor algorithms
Author
Lun, Daniel Pak-Kong ; Chan, Raymond ; Siu, Wan-chi
Author_Institution
Dept. of Electron. Eng., Hong Kong Polytech., Kowloon, Hong Kong
fYear
1990
fDate
3-6 Apr 1990
Firstpage
1499
Abstract
An in-place, in-order address generation scheme is proposed for the realization of prime factor mapping (PFM). The new approach has the characteristic of forming systematic and regular structures. Hence it is suitable for realizations using both high-level and low-level languages. Furthermore, it requires very few modulo operations and no modulo inverse for its computation; such inverses often take up memory space for their storage and/or extra time for the computation in other address generation algorithms. The approach has been implemented using Fortran 77 and the assembly language of the 320C25 DSP. It shows that a maximum of 86% saving in address generation time can be achieved as compared to the conventional approach
Keywords
FORTRAN listings; assembly language; computerised signal processing; digital arithmetic; storage allocation; 320C25 DSP; Fortran 77; address generation algorithms; address generation time; assembly language; high level languages; in-order address generation; in-place address generation; low-level languages; prime factor algorithms; prime factor mapping; Assembly; Digital signal processing; Discrete Fourier transforms; Equations; Fast Fourier transforms; Information retrieval; Signal generators; Signal processing; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1990. ICASSP-90., 1990 International Conference on
Conference_Location
Albuquerque, NM
ISSN
1520-6149
Type
conf
DOI
10.1109/ICASSP.1990.115691
Filename
115691
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