DocumentCode
2884271
Title
Analysis of pulse suppression in PWM modulation for symmetric cascaded multilevel inverters
Author
De Alvarenga, Marcos Balduino ; Pomilio, José Antenor
Author_Institution
Fed. Inst. of Educ., Univ. of Campinas - UNICAMP, Campinas, Brazil
fYear
2011
fDate
7-10 Nov. 2011
Firstpage
4654
Lastpage
4659
Abstract
Multilevel inverters are widely used in high-power applications involving high voltage and/or current. In this context, reductions in switching frequency contribute to decrease semiconductor losses, and allow the use of modulation techniques and devices available today. This article presents a strategy for the suppression of some of the PWM pulses in symmetrical cascaded multilevel inverters that reduces switching losses. It also provides an analysis of the impact of this strategy on the output signal quality.
Keywords
PWM invertors; modulation; PWM modulation; high-power applications; modulation techniques; pulse suppression analysis; semiconductor losses; switching frequency; symmetric cascaded multilevel inverters; Algorithm design and analysis; Inverters; Pulse width modulation; Switches; Switching frequency; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
IECON 2011 - 37th Annual Conference on IEEE Industrial Electronics Society
Conference_Location
Melbourne, VIC
ISSN
1553-572X
Print_ISBN
978-1-61284-969-0
Type
conf
DOI
10.1109/IECON.2011.6120078
Filename
6120078
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