Electrical-thermal coupling mechanism on operating limit of LDMOS transistor

The continuing march for reduction of feature size and enhancement of the functional integration is now seriously challenged by the limited capability in handling increased power dissipation, not only in power electronics but also in the field of VLSI and ULSI. Interaction between the electrical and thermal energy generated by self-heating is fundamental in understanding this power dissipation limit and safe operating area (SOA) of the semiconductor devices in both transient and steady-state operations. This work treats the problem of the electrical-thermal coupling (ETC) phenomena based on a LDMOS device through theoretical and experimental analyses. This report discusses an ETC driven snapback breakdown, "Hot-snapback", to explain the decrease in SOA, both voltage and current. The "Hot-snapback" process is much more favorable for explaining the device failure mechanism typically observed at the center of the thermal mass than the "intrinsic junction temperature" theory.