The modeling of GTO thyristors using spice

The development of modeling techniques for the gate turn-off (GTO) thyristors is described. These models are suitable for use in circuit simulators such as SPICE. Two approaches are examined: macro-modeling and micro-modeling. The macro-model uses conventional SPICE devices to create a sub-circuit which emulates the external behaviour of a GTO thyristor. This results in a model with low computational overheads and acceptable accuracy. For simulation work which requires a higher degree of accuracy, a micro-model based on semiconductor-physics equations has been implemented. Simulation results are presented to illustrate the general capabilities of these modeling techniques