Simulation of Si-SiO/sub 2/ defect generation in CMOS chips: from atomistic structure to chip failure rates

We present a theory for Si-SiO/sub 2/ defect generation related to hydrogen activation by hot electrons. Starting from atomistic considerations, we first explain the time dependence of degradation particularly at short-times. We show that this time dependence is intimately linked to variations of activation energies. These variations are then used to develop a theory for device failure times that includes detailed considerations of enhanced latent failure rates for deep-submicron devices. With this theory, we can connect experiments of degradation at short-times to latent failure rates which are difficult to assess otherwise.