Title :
Hot carrier reliability for 0.13 /spl mu/m CMOS technology with dual gate oxide thickness
Author :
Lin, C. ; Biesemans, S. ; Han, L.K. ; Houlihan, K. ; Schiml, T. ; Schruefer, K. ; Wann, C. ; Chen, J. ; Mahnkopf, R.
Author_Institution :
Infineon Technol., Hopewell Junction, NY, USA
Abstract :
Different PMOS hot carrier degradation mechanisms are observed in a 0.13 /spl mu/m CMOS technology with ultra-thin gate oxide. Surprisingly, the gate voltage plays a significant role in total Idsat degradation, even at low temperature (40/spl deg/C). Hole trapping instead of electron trapping is observed under max Idsat degradation condition for PMOS. It is also shown that nitrogen affects NMOS and PMOS hot carrier degradation differently.
Keywords :
CMOS integrated circuits; electron traps; hole traps; hot carriers; integrated circuit reliability; 0.13 micron; 40 C; CMOS technology; NMOS device; PMOS device; dual gate oxide thickness; electron trapping; hole trapping; hot carrier reliability; nitrogen implantation; saturation current; ultrathin gate oxide; CMOS technology; Charge carrier processes; Degradation; Electron traps; Hot carriers; Implants; MOS devices; Nitrogen; Temperature; Voltage;
Conference_Titel :
Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6438-4
DOI :
10.1109/IEDM.2000.904276
