Mechanical stress effect of etch-stop nitride and its impact on deep submicron transistor design

Author

Ito, S. ; Namba, H. ; Yamaguchi, K. ; Hirata, T. ; Ando, K. ; Koyama, S. ; Kuroki, S. ; Ikezawa, N. ; Suzuki, T. ; Saitoh, T. ; Horiuchi, T.

Author_Institution

ULSI Device Dev. Div., NEC Corp., Sagamihara, Japan

fYear

2000

fDate

10-13 Dec. 2000

Firstpage

247

Lastpage

250

Abstract

This paper, focusing on the effect of a plasma-enhanced CVD (PECVD) nitride contact-etch-stop layer, reports that process-induced mechanical stress affects the performance of short-channel CMOSFETs. We argue that the internal stress in the nitride layer changes transconductance (G/sub m/), thereby degrading NMOSFET performance by up to 8% and improving PMOSFET performance up to 7%. These performance changes are caused by changes of the electron and hole mobilities, so a precise transistor model considering this mobility change is necessary for deep-submicron transistor design.

Keywords

MOSFET; electron mobility; etching; hole mobility; internal stresses; plasma CVD coatings; NMOSFET; PMOSFET; deep-submicron transistor; electron mobility; hole mobility; internal stress; nitride contact-etch-stop layer; plasma-enhanced CVD; short-channel CMOSFET; transconductance; Compressive stress; Etching; Hydrogen; Internal stresses; MOSFET circuits; Plasma applications; Plasma devices; Plasma measurements; Stress measurement; Tensile stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-6438-4

Type

conf

DOI

10.1109/IEDM.2000.904303

Filename

904303