DocumentCode
2885301
Title
Engineering variations: towards practical single-electron (few-electron) memory
Author
Ishii, T. ; Osabe, T. ; Mine, T. ; Murai, F. ; Yano, K.
Author_Institution
Hitachi Central Res. Lab., Tokyo, Japan
fYear
2000
fDate
10-13 Dec. 2000
Firstpage
305
Lastpage
308
Abstract
The origin of device characteristic deviations of a single or a few-electrons memory, which are the most serious obstacles to achieving a practical memory, is studied from the viewpoint of fluctuation of storage dots. Our model, in which dot occupation area is essential for device characteristics, is compared to the measured characteristics of fabricated memory cells with various dot radii and densities. The potential to achieve gigabit class memory is demonstrated. Manufacturing enhancement by isolated-dots storage (MEID) is proposed as the practical benefit of nonvolatile multi-dot memories.
Keywords
semiconductor quantum dots; semiconductor storage; single electron transistors; MEID; device characteristic deviations; dot occupation area; dot radii; few-electron structures; gigabit class memory; manufacturing enhancement by isolated-dots storage; nonvolatile multi-dot memories; single-electron memory; storage dots; Area measurement; Density measurement; Equations; Fluctuations; Laboratories; Nonvolatile memory; Scalability; Single electron memory; Telephony; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-6438-4
Type
conf
DOI
10.1109/IEDM.2000.904317
Filename
904317
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