• DocumentCode
    2885397
  • Title

    A 32b floating point CMOS digital signal processor

  • Author

    Kawakami, Y. ; Tanaka, Hiroya ; Nukiyama, T. ; Yoshida, Manabu ; Nishitani, Takashi ; Kuroda, I. ; Araki, Masahiro ; Hoshi, T. ; Nakajima, Akitoshi

  • Author_Institution
    NEC Corp., Kawasaki, Japan
  • Volume
    XXIX
  • fYear
    1986
  • fDate
    19-21 Feb. 1986
  • Firstpage
    86
  • Lastpage
    87
  • Abstract
    A 1.5μm CMOS digital signal processor with 150ns instruction cycle time will be reported. The chip contains a 32b floating point parallel multiplier and a 55b floating point ALU. The IC contains 370K transistors.
  • Keywords
    CMOS process; CMOS technology; Circuits; Digital signal processors; Master-slave; National electric code; Pins; Read only memory; Read-write memory; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
  • Conference_Location
    Anaheim, CA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1986.1156980
  • Filename
    1156980
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2885397