• DocumentCode
    2885475
  • Title

    Modeling interconnection networks using a hardware description language

  • Author

    Freytag, Lynn R.

  • Author_Institution
    Dept. of Comput. Eng., Florida Atlantic Univ.,, Boca Raton, FL, USA
  • fYear
    1990
  • fDate
    7-9 Mar 1990
  • Firstpage
    536
  • Abstract
    Using a hardware descriptive language, it is possible to develop simulation models for processor interconnection networks which take hardware considerations into account during simulation. Models were produced for nine interconnection networks, specialized first for a simple algorithm, then adapted for a more complex task. Simulations were conducted to ensure the correctness of the models, and the complexities involved in expanding the simple example into the more complex one were considered. In particular, simulation results obtained with the DABL (Daisy Behavioral Language) model are presented. The DABL models were capable of providing more insight into hardware-related issues than simulations conducted in conventional programming languages
  • Keywords
    multiprocessor interconnection networks; specification languages; Daisy Behavioral Language; complexities; hardware description language; interconnection networks modelling; simulation; simulation models; Circuit simulation; Computational modeling; Computer simulation; Hardware design languages; Multiprocessor interconnection networks; Pins; Propagation delay; Registers; Routing; Sorting;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Databases, Parallel Architectures and Their Applications,. PARBASE-90, International Conference on
  • Conference_Location
    Miami Beach, FL
  • Print_ISBN
    0-8186-2035-8
  • Type

    conf

  • DOI
    10.1109/PARBSE.1990.77203
  • Filename
    77203