DocumentCode
2885684
Title
Digital error correction to increase speed of successive approximation
Author
Bacrania, K.
Author_Institution
Harris Semiconductor, Melbourne, FL, USA
Volume
XXIX
fYear
1986
fDate
19-21 Feb. 1986
Firstpage
140
Lastpage
141
Abstract
A digital correction procedure that reduces the conversion time of a standard 12b A/D converter from 12μs to 7μs with but a 15% increase in die area will be presented.
Keywords
Approximation algorithms; Circuits; Clocks; Decoding; Delay effects; Equations; Error correction; Logic; Oscillators; Shift registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location
Anaheim, CA, USA
Type
conf
DOI
10.1109/ISSCC.1986.1156996
Filename
1156996
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