DocumentCode
2885969
Title
A multistage delta-sigma modulator without double integration loop
Author
Hayashi, Teruaki ; Inabe, Y. ; Uchimura, Keiichi ; Kimura, Tomohiro
Author_Institution
NTT Linear Integrated Circuit Section, Electrical Communications Laboratories, Kanagawa, Japan
Volume
XXIX
fYear
1986
fDate
19-21 Feb. 1986
Firstpage
182
Lastpage
183
Abstract
A delta-sigma modulator using two interleaved single integration loops to reduce quantization noise by 20dB will be described. The technique avoids the instability of a double integration loop and demonstrates 14b resolution. A 1.5μm CMOS IC operates from a single 5V supply.
Keywords
CMOS technology; Circuit noise; Delta modulation; Digital modulation; Equations; Modulation coding; Noise cancellation; Phase change materials; Quantization; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location
Anaheim, CA, USA
Type
conf
DOI
10.1109/ISSCC.1986.1157015
Filename
1157015
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