Title :
A digital processor for decoding of composite TV signals using adaptive filtering
Author :
Yoshimoto, Masahiko ; Nakagawa, Sachiko ; Murakami, Kazuki ; Asai, Satoshi ; Akasaka, Y. ; Nakajima, Yoshiki ; Horiba, Y.
Author_Institution :
Mitsubishi Electic Corp., Itami, Japan
Abstract :
The adaptive separation of color TV signals into luminance/ chrominance components and color compensation using an 8b pipelined signal processor with a 2-line store will be described. A 2μm CMOS IC was designed for implementation with an 18K serial memory operated at 17.7MHz. Dissipation is 450mW.
Keywords :
Adaptive filters; Adders; CMOS logic circuits; CMOS process; CMOS technology; Decoding; Delay; Signal processing; Signal processing algorithms; TV;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location :
Anaheim, CA, USA
DOI :
10.1109/ISSCC.1986.1157019
